| Technical Name | From IC Layout to Die Photo: Deep Learning-Based IC Fabrication Simulation and Mask Correction | ||
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| Project Operator | National Tsing Hua University | ||
| Project Host | 林嘉文 | ||
| Summary | This technology consists of two convolutional neural networks (CNNs): LithoNet and OPCNet. LithoNet mimics the fabrication procedure, involving lithography and etching, to predict the shape of a fabricated IC circuitry given an input layout. OPCNet, in cooperation with a pre-trained LithoNet, mimics the optical proximity correction procedure used to correct the layout design and generate a modified photomask. |
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| Scientific Breakthrough | This technology is the first to use a deep neural network to accurately model the effect of lithography and etching processes on the shape deformation of a fabricated IC circuitry. It can also generates a correct mask pattern so that the fabricated IC circuitry will have a shape close to a desired pattern. The technolgy can lead to a paradigm shift of IC design for manufacturability. |
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| Industrial Applicability | This technology can be used by semiconductor manufacturers for modeling IC fabrication processes and IC design CAD tools for design for Manufacturability. |
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| Keyword | Deep Learning Covolutional Neural Network IC Fabrication Virtual Metrology Lithography Etching Photomask correctiin Optical Proximity Correction Computer Aided Design Design for Manufacturability | ||
| Notes | |||
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